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sy58604u 3.2gbps precision, lvpecl buffer with internal termination and fail safe input precision edge is a register ed trademark of micrel, inc. micrel inc. ? 2180 fortune drive ? san jose, ca 95131 ? usa ? tel +1 (408) 944-0800 ? fax + 1 (408) 474-1000 ? http://www.micrel.com general description the sy58604u is a 2.5/3.3v, high-speed, fully differential lvpecl buffer optimized to provide only 108fs rms phase jitter. the sy58604u can process clock signals as fast as 2.5ghz or data patterns up to 3.2gbps. the differential input includes micrel?s unique, 3-pin input termination architecture that interfaces to lvpecl, lvds or cml differential signals, (ac- or dc-coupled) as small as 100mv (200mv pp ) without any level-shifting or termination resistor networks in the signal path. for ac-coupled input interface applications, an integrated voltage reference (v ref-ac ) is provided to bias the v t pin. the output is 800mv lvpecl, with extremely fast rise/fall times guaranteed to be less than 110ps. the sy58604u operates from a 2.5v 5% supply or 3.3v 10% supply and is guaranteed over the full industrial temperature range (?40c to +85c). for applications that require cml or lvds outputs, consider the sy58603u and the sy58605u, buffers with 400mv and 325mv output swings respectively. the sy58604u is part of micrel?s high-speed, precision edge ? product line. datasheets and support documentation can be found on micrel?s web site at: www.micrel.com . functional block diagram precision edge ? features ? precision 800mv lvpecl buffer ? ultra-low jitter design ? 108fs rms phase jitter ? guaranteed ac performance over temperature and voltage: ? dc-to > 3.2gbps throughput ? <350ps typical propagation delay (in-to-q) ? <110ps rise/fall times ? fail safe input ? prevents output from oscillating when input is invalid ? high-speed lvpecl output ? 2.5v 5% or 3.3v 10% power supply operation ? industrial temperature range: ?40c to +85c ? available in 8-pin (2mm x 2mm) dfn package applications ? all sonet clock and data distribution ? fibre channel clock and data distribution ? gigabit ethernet clock and data distribution ? backplane distribution markets ? storage ? ate ? test and measurement ? enterprise networking equipment ? high-end servers ? access ? metro area network equipment september 2011 m9999-092911-d hbwhelp@micrel.com or (408) 955-1690
micrel, inc. sy58604u september 2011 2 m9999-092911-d hbwhelp@micrel.com ordering information (1) part number package type operating range package marking sy58604umg dfn-8 industrial 604 with pb-free bar-line indicator sy58604umgtr (2) dfn-8 industrial 604 with pb-free bar-line indicator notes: 1. contact factory for die availability. dice are guaranteed at t a = 25c, dc electricals only. 2. tape and reel. pin configuration 8-pin dfn pin description pin number pin name pin function 1, 4 in, /in differential input: this input pair is the di fferential signal input to the device. input accepts dc-coupled differential signals as small as 100mv (200mvpp). each pin of this pair internally terminates with 50 ? to the vt pin. if the input swing falls below a certain threshold (typical 30mv), the fail safe input (fsi) feature will guarantee a stable output by latching the output to its last valid state. see ?input interface applications? subsection for more details. 2 vt input termination center-tap: each input terminates to this pin. the vt pin provides a center-tap for each input (in, /in) to a termination network for maximum interface flexibility. see ?input interface applications? subsection. 3 vref-ac reference voltage: this output biases to v cc ?1.2v. it is used for ac-coupling inputs in and /in. connect vref-ac directly to the vt pin. bypass with 0.01f low esr capacitor to vcc. maximum sink/source current is 1.5ma. see ?input interface applications? subsection for more details. 5 gnd, exposed pad ground: exposed pad must be connected to a ground plane that is the same potential as the ground pin. 6, 7 /q, q lvpecl differential output pair: different ial buffered output copy of the input signal. the output swing is typically 800mv. see ?lvpecl ou tput termination? subsection. 8 vcc positive power supply: bypass with 0.1f//0.01f low esr capacitors as close to the v cc pin as possible. or (408) 955-1690
micrel, inc. sy58604u september 2011 3 m9999-092911-d hbwhelp@micrel.com or (408) 955-1690 absolute maximum ratings (1) supply voltage (v cc ) ............................... ?0.5v to +4.0v input voltage (v in ) ............................. ?0.5v to v cc +0.5v lvpecl output current (i out ) continuous.......................................................50ma surge .............................................................100ma current (v t ) source or sink on vt pin .............................100ma input current source or sink current on (in, /in) ................50ma current (v ref ) source or sink current on v ref -ac (4) ............1.5ma maximum operating junc tion temperature.......... 125c lead temperature (solde ring, 20sec .) .................. 260c storage temperature (t s ) ....................?65c to +150c operating ratings (2) supply voltage (v in ) ........................ +2.375v to +3.60v ambient temperature (t a ) ................... ?40c to +85c package thermal resistance (3) dfn still-air ( ja ) ............................................ 93c/w junction-to-board ( jb ).......................... 56c/w dc electrical characteristics (5) t a = ?40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v cc power supply voltage range 2.375 3.0 2.5 3.3 2.625 3.6 v i cc power supply current no load, max. v cc 30 45 ma r diff_in differential input resistance (in-to-/in) 90 100 110 ? v ih input high voltage (in, /in) in, /in, note 7 v cc ?1.6 v cc v v il input low voltage (in, /in) in, /in 0 v ih ?0.1 v v in input voltage swing (in, /in) see figure 3a, note 6 0.1 1.7 v v diff_in differential input voltage swing (|in - /in|) see figure 3b 0.2 v v in_fsi input voltage threshold that triggers fsi 30 100 mv v ref-ac output reference voltage v cc ?1.3 v cc ?1.2 v cc ?1.1 v v t_in voltage from input to v t 1.28 v notes: 1. permanent device damage may occur if absolute maximum ratings are exceeded. this is a stress rating only and functional ope ration is not implied at conditions other than those deta iled in the operational sections of this data sheet. exposure to absolute maximum ra tings conditions for extended periods may affect device reliability. 2. the data sheet limits are not guaranteed if t he device is operated beyond the operating ratings. 3. package thermal resistance assumes exposed pad is soldered (or equivalent) to the device's most negative potential on the pc b. jb and ja values are determined for a 4-layer board in still-air number, unless otherwise stated. 4. due to the limited drive capability, use for input of the same package only. 5. the circuit is designed to meet the dc specifications shown in the above table after thermal equilibrium has been establishe d. 6. v in (max) is specified when v t is floating. 7. v ih (min) not lower than 1.2v.
micrel, inc. sy58604u september 2011 4 m9999-092911-d hbwhelp@micrel.com or (408) 955-1690 lvpecl outputs dc electrical characteristics (5) v cc = +2.5v 5% or +3.3v 10%, r l = 50 ? to v cc -2v; t a = ?40c to +85c, unless otherwise stated. symbol parameter condition min typ max units v oh output high voltage v cc -1.145 v cc -0.895 v v ol output low voltage v cc -1.945 v cc -1.695 v v out output voltage swing see figure 3a 550 800 950 mv v diff_out differential output voltage swing see figure 3b 1100 1600 mv
micrel, inc. sy58604u september 2011 5 m9999-092911-d hbwhelp@micrel.com ac electrical characteristics v cc = +2.5v 5% or +3.3v 10%, r l = 50 ? to v cc -2v, input t r /t f : < 300ps; t a = ?40c to +85c, unless otherwise stated. symbol parameter condition min typ max units nrz data 3.2 4.25 gbps f max maximum frequency v out > 400mv clock 2.5 3 ghz v in : 100mv-200mv 180 320 450 ps t pd propagation delay in-to-q v in : 200mv-800mv 150 230 350 ps t skew part-to-part skew note 7 135 ps t jitter rms phase jitter output = 622mhz integration range: 12khz ? 20mhz 108 fs rms t r, t f output rise/fall times (20% to 80%) at full output swing. 40 75 110 ps duty cycle differential i/o 47 53 % notes: 7. part-to-part skew is defined for two parts with identical pow er supply voltages at the same temperature and no skew at the e dges at the respective inputs. phase noise plot or (408) 955-1690
micrel, inc. sy58604u september 2011 6 m9999-092911-d hbwhelp@micrel.com functional description fail-safe input (fsi) the input includes a special failsafe circuit to sense the amplitude of the input signal and to latch the outputs when there is no input signal present, or when the amplitude of the input signal drops sufficiently below 100mv pk (200mv pp ), typically 30mv pk . maximum frequency of sy58604u is limited by the fsi function. input clock failure case if the input clock fails to a fl oating, static, or extremely low signal swing, then the fsi function will eliminate a metastable condition and guarantee a stable output. no ringing and no undetermi ned state will occur at the output under these conditions. note that the fsi function will not prevent duty cycle distortion in case of a sl owly deteriorating (but still toggling) input signal. due to the fsi function, the propagation delay will depend on rise and fall time of the input signal and on its amplitude. refer to ?typical characteristics? for detailed information. timing diagrams figure 1a. propagation delay figure 1b. fail safe feature or (408) 955-1690
micrel, inc. sy58604u september 2011 7 m9999-092911-d hbwhelp@micrel.com typical characteristics v cc = 3.3v, gnd = 0v, v in = 100mv, r l = 50 ? to v cc -2v, t a = 25c, unless otherwise stated. or (408) 955-1690
micrel, inc. sy58604u september 2011 8 m9999-092911-d hbwhelp@micrel.com functional characteristics v cc = 3.3v, gnd = 0v, v in = 400mv, data pattern: 2 23 -1, r l = 50 ? to v cc -2v, t a = 25c, unless ot herwise stated. or (408) 955-1690
micrel, inc. sy58604u september 2011 9 m9999-092911-d hbwhelp@micrel.com functional characteristics (continued) v cc = 3.3v, gnd = 0v, v in = 400mv, r l = 50 ? to v cc -2v, t a = 25c, unless otherwise stated. or (408) 955-1690
micrel, inc. sy58604u september 2011 10 m9999-092911-d hbwhelp@micrel.com input and output stage figure 2a. simplified differential input buffer figure 2b. simplified lvpecl output buffer single-ended and differential swings figure 3a. single-ended voltage swing figure 3b. differential voltage swing or (408) 955-1690
micrel, inc. sy58604u september 2011 11 m9999-092911-d hbwhelp@micrel.com input interface applications figure 4a. cml interface (dc-coupled) option: may connect v t to v cc figure 4b. cml interface (ac-coupled) figure 4c. lvpecl interface (dc-coupled) figure 4d. lvpecl interface (ac-coupled) figure 4e. lvds interface or (408) 955-1690
micrel, inc. sy58604u september 2011 12 m9999-092911-d hbwhelp@micrel.com lvpecl output termination lvpecl outputs have very low output impedance (open emitter), and small signal swing which results in low emi. lvpecl is ideal for driving 50 ? -and-100 ? - controlled impedance transmission lines. there are several techniques in terminating the lvpecl output, as shown in figure 5a and 5b. figure 5b. three-resistor ?y-termination? figure 5a. parallel termination-thevenin equivalent related product and support documents part number function data sheet link sy58603u 4.25gbps precision cml buffer with internal termination and fail safe input http://www.micrel.com/page.do?page=/product- info/products/sy58603u.shtml sy58605u 3.2gbps precision lvds buffer with internal termination and fail safe input http://www.micrel.com/page.do?page=/product- info/products/sy58605u.shtml hbw solutions new products and termination application notes http://www.micrel.com/page.do?page=/product- info/as/hbwsolutions.shtml or (408) 955-1690
micrel, inc. sy58604u september 2011 13 m9999-092911-d hbwhelp@micrel.com package information 8-pin (2mm x 2mm) dfn micrel, inc. 2180 fortune drive san jose, ca 95131 usa tel +1 (408) 944-0800 fax +1 (408) 474-1000 web http://www.micrel.com micrel makes no representations or warranties with respect to t he accuracy or completeness of the information furnished in this data sheet. this information is not intended as a warranty and micrel does not assume responsibility for it s use. micrel reserves the right to change circuitry, fications and descriptions at any time without notice. no license, whether express, implied, arising by estoppel or otherw ise, to any intellec property rights is granted by this document. except as provided in micrel?s terms and conditions of sale for such products, mi crel assumes no liability whatsoever, and micrel disclaims any express or implied warranty relati ng to the sale and/or use of micrel products i ncluding liability or arranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property righ speci tual w t. micrel products are not designed or authori zed for use as components in life support app liances, devices or systems where malfu nction of a p r ? 2005 micrel, incor roduct can reasonably be expected to result in personal injury. li fe support devices or systems are devices or systems that (a ) are intended fo surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to resul t in a significant injury to the user. a purchaser?s use or sale of micrel products for use in life support app liances, devices or systems is a purchaser ?s own risk and purchaser agrees to fully indemnify micrel for any damages resulting from such use or sale. p orated. or (408) 955-1690

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